[PATCH 1/3] x86: allow Kconfig control over psABI level

[Jan Beulich <jbeulich@xxxxxxxx>]

Newer hardware offers more efficient and/or flexible and/or capable
instructions, some of which we can make good use of in the hypervisor
as well. Allow a basic way (no alternatives patching) of enabling their
use. Of course this means that hypervisors thus built won't work
anymore on older, less capable hardware.

Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
---
TBD: Should we, just like for NX, add an early check in assembly code,
     to have a "clean" failure rather than a random crash?

Whereas the baseline -> v2 step isn't much of a difference (we'll gain
more there by a subsequent patch), v2 -> v3, while presumably (or shall
I say hopefully) faster, yields an overall growth of .text size by (in
my build) about 2k. The primary reason for this appear to be conversions
of SHL-by-immediate to SHLX.

--- a/xen/arch/x86/Kconfig
+++ b/xen/arch/x86/Kconfig
@@ -118,6 +118,36 @@ config HVM
 
          If unsure, say Y.
 
+choice
+       prompt "base psABI level"
+       default X86_64_BASELINE
+       help
+         The psABI defines 4 levels of ISA extension sets as a coarse granular
+         way of identifying advanced functionality that would be uniformly
+         available in respectively newer hardware.  While v4 is not really of
+         interest for Xen, the others can be selected here, making the
+         resulting Xen no longer work on older hardware.  This option won't
+         have any effect if the toolchain doesn't support the distinction.
+
+         If unsure, stick to the default.
+
+config X86_64_BASELINE
+       bool "baseline"
+
+config X86_64_V2
+       bool "v2"
+       help
+         This enables POPCNT and CX16, besides other extensions which are of
+         no interest here.
+
+config X86_64_V3
+       bool "v3"
+       help
+         This enables BMI, BMI2, LZCNT, and MOVBE, besides other extensions
+         which are of no interest here.
+
+endchoice
+
 config XEN_SHSTK
        bool "Supervisor Shadow Stacks"
        depends on HAS_AS_CET_SS
--- a/xen/arch/x86/arch.mk
+++ b/xen/arch/x86/arch.mk
@@ -36,6 +36,10 @@ CFLAGS += -mno-red-zone -fpic
 # the SSE setup for variadic function calls.
 CFLAGS += -mno-mmx -mno-sse $(call cc-option,$(CC),-mskip-rax-setup)
 
+# Enable the selected baseline ABI, if supported by the compiler.
+CFLAGS-$(CONFIG_X86_64_V2) += $(call cc-option,$(CC),-march=x86-64-v2)
+CFLAGS-$(CONFIG_X86_64_V3) += $(call cc-option,$(CC),-march=x86-64-v3)
+
 ifeq ($(CONFIG_INDIRECT_THUNK),y)
 # Compile with gcc thunk-extern, indirect-branch-register if available.
 CFLAGS-$(CONFIG_CC_IS_GCC) += -mindirect-branch=thunk-extern