Re: [PATCH v2] x86/ioapic: sanitize IO-APIC pins before enabling lapic LVTERR/ESR

[Jan Beulich <jbeulich@xxxxxxxx>]

On 14.07.2023 18:03, Roger Pau Monne wrote:
> The current logic to init the local APIC and the IO-APIC does init the
> local APIC LVTERR/ESR before doing any sanitation on the IO-APIC pin

Nit: I guess I'll take the liberty of making this read "sanitization"
while committing.

> configuration.  It's already noted on enable_IO_APIC() that Xen
> shouldn't trust the IO-APIC being empty at bootup.
> 
> At XenServer we have a system where the IO-APIC 0 is handed to Xen
> with pin 0 unmasked, set to Fixed delivery mode, edge triggered and
> with a vector of 0 (all fields of the RTE are zeroed).  Once the local
> APIC LVTERR/ESR is enabled periodic injections from such pin cause the
> local APIC to in turn inject periodic error vectors:
> 
> APIC error on CPU0: 00(40), Received illegal vector
> APIC error on CPU0: 40(40), Received illegal vector
> APIC error on CPU0: 40(40), Received illegal vector
> APIC error on CPU0: 40(40), Received illegal vector
> APIC error on CPU0: 40(40), Received illegal vector
> APIC error on CPU0: 40(40), Received illegal vector
> 
> That prevents Xen from booting.
> 
> Move the masking of the IO-APIC pins ahead of the setup of the local
> APIC.  This has the side effect of also moving the detection of the
> pin where the i8259 is connected, as such detection must be done
> before masking any pins.
> 
> Signed-off-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>

Reviewed-by: Jan Beulich <jbeulich@xxxxxxxx>