[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v8 05/13] vpci/header: implement guest BAR register handlers


  • To: Jan Beulich <jbeulich@xxxxxxxx>
  • From: Roger Pau Monné <roger.pau@xxxxxxxxxx>
  • Date: Fri, 21 Jul 2023 13:52:06 +0200
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=citrix.com; dmarc=pass action=none header.from=citrix.com; dkim=pass header.d=citrix.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=k8E/Idi4d0YJndDO0Gly9y7qjFVhI+dmrB1Z7CPJ0/Y=; b=kPbsF2znleI18J2saEF12/wvejZyxFrsjNEc84VjkXtL5uOELE3+piWCZF5o93lbNYixzxFE1BGFIKp/E2Y8QQQVGIHeq14m5Pt6TmsQe4j6/hEPL9lAYpjZQofBQloSk8vtOgTQlnBe/RPbdqC2UgEQk+HwUwL/Ji4xZ4e9V5G23BK9SeNd5hEtyPLzLS3R5GnOKEUWcJFQ7INPMArxlqTE7OZrDpGHvVbvykiBJwxHfi3pYGCqhc+92zapVrSMQem50PCAUHhXECPBRMWkZs/p+95z0Z8mlH2xr6ikruGs6Wf/kKifoqnEhzuS+ABNRMkftw17NEMI3kooeg8lQQ==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=lkHDOdDJ9zkg/VaMGS/gmBGUXs0xK+m5zqGFtuJ5yJxz3gIooQwMkK3kAymRSCsaSmzVI/nQEcuB5Mxy8vpjlsF1EkIC8mDc5YSBDgve/FEwL/SIWW7KUE/RtBpycnxssKJMgwKxp/uHeXapf/dELzlvcuYRiXPpapY6JCcZ/Mjfx55dIhNXqeN7ZcoGuXG+jqU2MKbseh1PfhaaRQnYs4iZf3XxgAlPSOVcN3cJkYw+2byi4VAivRP/HJmR1csc7xBsQgPqrcwDpc/ihclT/hHWYOXAZRq0dif5vL/ib6FvaGstWPLXtOLqRKADAxjY0iMnn2TQvp7hV/4bwXYhcg==
  • Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=citrix.com;
  • Cc: Rahul Singh <Rahul.Singh@xxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Oleksandr Andrushchenko <Oleksandr_Andrushchenko@xxxxxxxx>
  • Delivery-date: Fri, 21 Jul 2023 11:52:32 +0000
  • Ironport-data: A9a23:fkkMTqyzhGdrJiiKG1V6t+fYxyrEfRIJ4+MujC+fZmUNrF6WrkUDm jYdD2uPaPbcZmqnc4x3OdjkoEJV68fVndQwTgtvrSAxQypGp/SeCIXCJC8cHc8wwu7rFxs7s ppEOrEsCOhuExcwcz/0auCJQUFUjP3OHfykTrafYEidfCc8IA85kxVvhuUltYBhhNm9Emult Mj75sbSIzdJ4RYtWo4vw/zF8EoHUMja4mtC5QRhP6kT5TcyqlFOZH4hDfDpR5fHatE88t6SH 47r0Ly/92XFyBYhYvvNfmHTKxBirhb6ZGBiu1IOM0SQqkEqSh8ai87XAME0e0ZP4whlqvgqo Dl7WT5cfi9yVkHEsLx1vxC1iEiSN4UekFPMCSDXXcB+UyQq2pYjqhljJBheAGEWxgp4KT1X0 aU1bzQ0VU6Ope+v442Dd9BLidt2eaEHPKtH0p1h5RfwKK9+BLX8GeDN79Ie2yosjMdTG/qYf 9AedTdkcBXHZVtIJ0sTD5U92uyvgxETcRUB8A7T+fVxvjWVlVQuuFTuGIO9ltiiX8Jak1zev mvb12/4HgsbJJqUzj/tHneE37aRzX2lBN9CfFG+3tdM0Fyr1G8qMSMPW1KbgtK+ihK/Q/sKf iT4/QJr98De7neDTNPwQhm5q36spQMHVpxbFOhSwDuEyrfQpT2YAGcEZjdbbZots8pebQIt0 liFjtb4HwtFubeeSW+e3rqMpDb0Mi8QRUcSaClBQQYb7t3LpIAokgmJXttlCLSyjND+BXf32 T/ihA86irYIhMgHzZKS+1zdnimsrZjESA0yzgjPV2fj5QR8DLNJfKSt4FnfqPNfdoCQSwDZu GBewpDBqucTEZuKiSqBBv0XG62k7OqENzuahkNzG54m9HKm/HvLkZ1s3QyS7XxBaq4sEQIFq meK0e+NzPe/5EeXUJI=
  • Ironport-hdrordr: A9a23:TZvgiawc7CIdok7SIyX8KrPwT71zdoMgy1knxilNoH1uEvBw8v rEoB1173LJYVoqMk3I+urgBED/exzhHPdOiOEs1NyZMDUO1lHHEL1f
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>

On Fri, Jul 21, 2023 at 12:50:23PM +0200, Jan Beulich wrote:
> On 21.07.2023 12:36, Rahul Singh wrote:
> >> On 20 Jul 2023, at 1:32 am, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx> 
> >> wrote:
> >> @@ -599,34 +681,50 @@ static int cf_check init_bars(struct pci_dev *pdev)
> >>         bars[i].size = size;
> >>         bars[i].prefetchable = val & PCI_BASE_ADDRESS_MEM_PREFETCH;
> > 
> > I think there is a need to set the BAR mem type and prefetchable bit to the 
> > guest_reg also to avoid mismatch when Guest kernel initially read the BAR’s.
> 
> Perhaps more generally: Shouldn't r/o bits be handed through in almost
> all cases?

I remember in an earlier version suggesting to store the guest
address, instead of the guest BAR register value.  Then the flags
would be unconditionally added in guest_bar_read() and we wouldn't
need to worry about initializing the register.

Thanks, Roger.



 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.