Re: [PATCH v3 2/2] x86: detect PIT aliasing on ports other than 0x4[0-3]

[Jason Andryuk <jason.andryuk@xxxxxxx>]

On 2024-05-22 08:59, Jan Beulich wrote:
> ... in order to also deny Dom0 access through the alias ports (commonly
> observed on Intel chipsets). Without this it is only giving the
> impression of denying access to PIT. Unlike for CMOS/RTC, do detection
> pretty early, to avoid disturbing normal operation later on (even if
> typically we won't use much of the PIT).
>
> Like for CMOS/RTC a fundamental assumption of the probing is that reads
> from the probed alias port won't have side effects (beyond such that PIT
> reads have anyway) in case it does not alias the PIT's.
>
> As to the port 0x61 accesses: Unlike other accesses we do, this masks
> off the top four bits (in addition to the bottom two ones), following
> Intel chipset documentation saying that these (read-only) bits should
> only be written with zero.
>
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
> --- a/xen/arch/x86/time.c
> +++ b/xen/arch/x86/time.c
> @@ -427,6 +427,74 @@ static struct platform_timesource __init
>       .resume = resume_pit,
>   };
>   
> +unsigned int __initdata pit_alias_mask;
> +
> +static void __init probe_pit_alias(void)
> +{
> +    unsigned int mask = 0x1c;
> +    uint8_t val = 0;
> +
> +    if ( !opt_probe_port_aliases )
> +        return;
> +
> +    /*
> +     * Use channel 2 in mode 0 for probing.  In this mode even a non-initial
> +     * count is loaded independent of counting being / becoming enabled.  Thus
> +     * we have a 16-bit value fully under our control, to write and then check
> +     * whether we can also read it back unaltered.
> +     */
> +
> +    /* Turn off speaker output and disable channel 2 counting. */
> +    outb(inb(0x61) & 0x0c, 0x61);
> +
> +    outb(PIT_LTCH_CH(2) | PIT_RW_LSB_MSB | PIT_MODE_EOC | PIT_BINARY,
> +         PIT_MODE);
> +
> +    do {
> +        uint8_t val2;
> +        unsigned int offs;
> +
> +        outb(val, PIT_CH2);
> +        outb(val ^ 0xff, PIT_CH2);
> +
> +        /* Wait for the Null Count bit to clear. */
> +        do {
> +            /* Latch status. */
> +            outb(PIT_RDB | PIT_RDB_NO_COUNT | PIT_RDB_CH2, PIT_MODE);
> +
> +            /* Try to make sure we're actually having a PIT here. */
> +            val2 = inb(PIT_CH2);
> +            if ( (val2 & ~(PIT_STATUS_OUT_PIN | PIT_STATUS_NULL_COUNT)) !=
> +                 (PIT_RW_LSB_MSB | PIT_MODE_EOC | PIT_BINARY) )
> +                return;
> +        } while ( val2 & (1 << 6) );
You can use PIT_STATUS_NULL_COUNT here.

With that:
Reviewed-by: Jason Andryuk <jason.andryuk@xxxxxxx>

Thanks,
Jason