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[PATCH] x86/kexec: Separate code and data by at least 1 cacheline



No functional change, but it performs a bit better.

Signed-off-by: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
---
CC: Jan Beulich <JBeulich@xxxxxxxx>
CC: Roger Pau Monné <roger.pau@xxxxxxxxxx>

v2:
 * Rebase over metadata changes.
---
 xen/arch/x86/x86_64/kexec_reloc.S | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/xen/arch/x86/x86_64/kexec_reloc.S 
b/xen/arch/x86/x86_64/kexec_reloc.S
index 9f40c80d7c4b..50ba454abd48 100644
--- a/xen/arch/x86/x86_64/kexec_reloc.S
+++ b/xen/arch/x86/x86_64/kexec_reloc.S
@@ -19,6 +19,7 @@
 #include <xen/kimage.h>
 
 #include <asm/asm_defns.h>
+#include <asm/cache.h>
 #include <asm/msr-index.h>
 #include <asm/page.h>
 #include <asm/machine_kexec.h>
@@ -174,6 +175,9 @@ FUNC_LOCAL(compatibility_mode)
         ud2
 END(compatibility_mode)
 
+        /* Separate code and data into into different cache lines */
+        .balign L1_CACHE_BYTES
+
 DATA_LOCAL(compat_mode_gdt_desc, 4)
         .word .Lcompat_mode_gdt_end - compat_mode_gdt -1
         .quad 0x0000000000000000     /* set in call_32_bit above */
-- 
2.39.5




 


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