[PATCH 2/4] x86: Add architectural LBR declarations

[ngoc-tu.dinh@xxxxxxxxxx]

From: Tu Dinh <ngoc-tu.dinh@xxxxxxxxxx>

Signed-off-by: Tu Dinh <ngoc-tu.dinh@xxxxxxxxxx>
---
 xen/arch/x86/include/asm/msr-index.h | 11 +++++++++++
 1 file changed, 11 insertions(+)

diff --git a/xen/arch/x86/include/asm/msr-index.h 
b/xen/arch/x86/include/asm/msr-index.h
index 9cdb5b2625..867deab3c6 100644
--- a/xen/arch/x86/include/asm/msr-index.h
+++ b/xen/arch/x86/include/asm/msr-index.h
@@ -304,6 +304,17 @@
 #define MSR_IA32_LASTINTFROMIP         0x000001dd
 #define MSR_IA32_LASTINTTOIP           0x000001de
 
+/* Architectural LBR state MSRs */
+#define MSR_IA32_LASTBRANCH_CTL                0x000014ce
+#define  LASTBRANCH_CTL_LBREN          (1<<0) /* Enable LBR recording */
+#define  LASTBRANCH_CTL_VALID          _AC(0x7f000f, ULL)
+#define MSR_IA32_LASTBRANCH_DEPTH      0x000014cf
+#define MSR_IA32_LER_INFO              0x000001e0
+#define MSR_IA32_LASTBRANCH_0_INFO     0x00001200
+#define MSR_IA32_LASTBRANCH_0_FROM_IP  0x00001500
+#define MSR_IA32_LASTBRANCH_0_TO_IP    0x00001600
+#define MAX_MSR_ARCH_LASTBRANCH_FROM_TO        64
+
 #define MSR_IA32_POWER_CTL             0x000001fc
 
 #define MSR_IA32_MTRR_PHYSBASE(n)   (0x00000200 + 2 * (n))
-- 
2.43.0



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