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Re: [PATCH 2/4] x86: Add architectural LBR declarations
- To: ngoc-tu.dinh@xxxxxxxxxx
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Tue, 26 Nov 2024 12:34:07 +0100
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- Cc: xen-devel@xxxxxxxxxxxxxxxxxxxx
- Delivery-date: Tue, 26 Nov 2024 11:34:14 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 18.11.2024 09:49, ngoc-tu.dinh@xxxxxxxxxx wrote:
> --- a/xen/arch/x86/include/asm/msr-index.h
> +++ b/xen/arch/x86/include/asm/msr-index.h
> @@ -304,6 +304,17 @@
> #define MSR_IA32_LASTINTFROMIP 0x000001dd
> #define MSR_IA32_LASTINTTOIP 0x000001de
>
> +/* Architectural LBR state MSRs */
> +#define MSR_IA32_LASTBRANCH_CTL 0x000014ce
> +#define LASTBRANCH_CTL_LBREN (1<<0) /* Enable LBR recording
> */
> +#define LASTBRANCH_CTL_VALID _AC(0x7f000f, ULL)
> +#define MSR_IA32_LASTBRANCH_DEPTH 0x000014cf
> +#define MSR_IA32_LER_INFO 0x000001e0
> +#define MSR_IA32_LASTBRANCH_0_INFO 0x00001200
> +#define MSR_IA32_LASTBRANCH_0_FROM_IP 0x00001500
> +#define MSR_IA32_LASTBRANCH_0_TO_IP 0x00001600
> +#define MAX_MSR_ARCH_LASTBRANCH_FROM_TO 64
This is rather NUM than MAX; MAX would be 63.
Jan
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