[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [PATCH v5 1/3] xen/arm: mpu: Create boot-time MPU protection regions


  • To: Julien Grall <julien@xxxxxxx>, Ayan Kumar Halder <ayan.kumar.halder@xxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx
  • From: Ayan Kumar Halder <ayankuma@xxxxxxx>
  • Date: Mon, 18 Nov 2024 11:12:16 +0000
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=amd.com; dmarc=pass action=none header.from=amd.com; dkim=pass header.d=amd.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=mRjWJLPEiDeDCX0UwMRDH1xZXMWZpswN2pOHaQ7hz+g=; b=ULwTaBpqgIJ7palzFBvo2driMRSdHy6hfeaYyrGNdVFYDN5DuKiiU63pb6QlcztFsEscw0hTdRGVwaRlTJLqNl8qg7ObfO2l3hpqIb83bRKUm5ATlc1m5QWH/4VpCILRTmYFNrK4ObEsU2ZjOORwelbD93aOY+Yi+Ta7gm8VN7S7sr3u5dGwladU7CTZ8nXrh9yRrJ/VtKoWWUoZRbPf0ZHret3HJsKtx5Z7KOs+/Di4WdhMAAvr50GJd9NtlBlGO4sLDjSkzLXqSlg9Fe8s7mrx8XF2VVX7BjwduVWNa/YteYPzF/rXrJLSyuDjlTAnauYfWUzOLPT3CCSavwrANA==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=Vc3aquoRcZOQlhHLSn8b1JkDGljlcKJ5alD5wx2bGeBdPXUpaqO2G9hq4NGJW1YXHl7bRJNNKgnIaC6oE25ddFdcyAUjMo9ULZ1UJkyXTYdOpeJEaDrR6u7J8H6EOUS6Xf6MvGT0breMWDC95RPcQjciiQBNDOPMLP8vc5OtBvttRk09kqeZRAZQ5D5dK0bUfvK9OJ1vSqQ6yaXoUdPIurzqaItkn1QkUyyuicKU/agpZUbFBasTDZSADjsKj/U8NNLHXFoh5e8QVE6yWQn7DMWLzTaGOu+H8Lv0pSkp3yX1nkj4hxr4V8pPobMWHvlRwIvqd8ljrEYU0/hH9arHkA==
  • Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=amd.com;
  • Cc: Stefano Stabellini <sstabellini@xxxxxxxxxx>, Bertrand Marquis <bertrand.marquis@xxxxxxx>, Michal Orzel <michal.orzel@xxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>
  • Delivery-date: Mon, 18 Nov 2024 11:12:38 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>


On 16/11/2024 10:30, Julien Grall wrote:
Hi Ayan,
Hi Julien,

On 07/11/2024 15:03, Ayan Kumar Halder wrote:
+/*
+ * Macro to prepare and set a EL2 MPU memory region.
+ * We will also create an according MPU memory region entry, which
+ * is a structure of pr_t,  in table \prmap.
+ *
+ * Inputs:
This needs to be removed as some parameters are both input and output (eg sel) and some parameters are for temporary storage (eg prbar, prlar).
+ * sel:         region selector

``sel`` is now also an output. But looking at the description, we don't seem to say which registers are preserved or not. For instance, both ..

+ * base:        reg storing base address (should be page-aligned) > + * limit:       reg storing limit address

... the two registers above will be clobbered. On the other hand...

+ * prbar:       store computed PRBAR_EL2 value
+ * prlar:       store computed PRLAR_EL2 value
+ * maxcount:    maximum number of EL2 regions supported

... this will be preserved. So I think we need to clarify it. For instance, this is the description of create_table_entry_from_paddr:
Actually prbar, prlar are similar to tmp1, tmp2 (ie scratch registers). I used the names so as to make it more meaningful.

/*
 * Macro to create a page table entry in \ptbl to \tbl
 * ptbl:    table symbol where the entry will be created
 * tbl:     physical address of the table to point to
 * virt:    virtual address
 * lvl:     page-table level
 * tmp1:    scratch register
 * tmp2:    scratch register
 *
 * Preserves \virt
 * Clobbers \tbl, \tmp1, \tmp2
 *
 * Note that all parameters using registers should be distinct.
 */

In our case, it will be

/*
 * Macro to prepare and set a EL2 MPU memory region.
 * We will also create an according MPU memory region entry, which
 * is a structure of pr_t,  in table \prmap.
 *
 * sel:         region selector
 * base:        reg storing base address
 * limit:       reg storing limit address
 * prbar:       store computed PRBAR_EL2 value
 * prlar:       store computed PRLAR_EL2 value
 * maxcount:    maximum number of EL2 regions supported
 * attr_prbar:  PRBAR_EL2-related memory attributes. If not specified it will be
 * REGION_DATA_PRBAR
 * attr_prlar:  PRLAR_EL2-related memory attributes. If not specified it will be
 *              REGION_NORMAL_PRLAR
 *
 * Preserves \maxcount
 * Clobbers \sel, \base, \limit, \prbar, \prlar
 *
 * Note that all parameters using registers should be distinct.
 */

- Ayan




 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.