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Re: [PATCH v5 2/3] xen/arm32: Create the same boot-time MPU regions as arm64
- To: Ayan Kumar Halder <ayan.kumar.halder@xxxxxxx>
- From: Luca Fancellu <Luca.Fancellu@xxxxxxx>
- Date: Tue, 8 Apr 2025 09:06:50 +0000
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- Cc: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Julien Grall <julien@xxxxxxx>, Bertrand Marquis <Bertrand.Marquis@xxxxxxx>, Michal Orzel <michal.orzel@xxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>
- Delivery-date: Tue, 08 Apr 2025 09:07:48 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
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- Thread-index: AQHbp+1A9+alQyM7NUm0i9guCUDbS7OZeyCA
- Thread-topic: [PATCH v5 2/3] xen/arm32: Create the same boot-time MPU regions as arm64
Hi Ayan,
> On 7 Apr 2025, at 19:44, Ayan Kumar Halder <ayan.kumar.halder@xxxxxxx> wrote:
>
> We have created the same boot-time MPU protection regions as Armv8-R AArch64.
> Also, we have defined *_PRBAR macros for arm32. The only difference from
> arm64 is that XN is 1-bit for arm32.
> The macros have been defined in mpu/cpregs.h.
>
> Also defined WRITE_SYSREG_ASM() to write to system registers in assembly.
>
> Signed-off-by: Ayan Kumar Halder <ayan.kumar.halder@xxxxxxx>
> ---
>
[…]
> diff --git a/xen/arch/arm/include/asm/arm32/sysregs.h
> b/xen/arch/arm/include/asm/arm32/sysregs.h
> index 22871999af..a90d1610a1 100644
> --- a/xen/arch/arm/include/asm/arm32/sysregs.h
> +++ b/xen/arch/arm/include/asm/arm32/sysregs.h
> @@ -20,6 +20,13 @@
> * uses r0 as a placeholder register. */
> #define CMD_CP32(name...) "mcr " __stringify(CP32(r0, name)) ";"
>
> +#define REGION_TEXT_PRBAR 0x18 /* SH=11 AP=10 XN=0 */
> +#define REGION_RO_PRBAR 0x1D /* SH=11 AP=10 XN=1 */
> +#define REGION_DATA_PRBAR 0x19 /* SH=11 AP=00 XN=1 */
> +#define REGION_DEVICE_PRBAR 0x11 /* SH=10 AP=00 XN=1 */
> +
> +#define WRITE_SYSREG_ASM(v, name) mcr CP32(v, name)
probably the same applies to this patch, this one needs to stay where
__ASSEMBLY__ is defined?
The rest looks good to me!
Reviewed-by: Luca Fancellu <luca.fancellu@xxxxxxx>
Cheers,
Luca
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