[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

RE: [PATCH v4 05/15] xen/x86: introduce "cpufreq=amd-cppc" xen cmdline


  • To: Jan Beulich <jbeulich@xxxxxxxx>
  • From: "Penny, Zheng" <penny.zheng@xxxxxxx>
  • Date: Mon, 19 May 2025 08:36:44 +0000
  • Accept-language: en-US
  • Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=amd.com; dmarc=pass action=none header.from=amd.com; dkim=pass header.d=amd.com; arc=none
  • Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=Gns/AnUio66ezaanr2QOzkBfgwoCi6WD1aIav/++4Yk=; b=xB7vjTwPsBL/2qeD6bDiv3qavh2iVP+BI1gwgxTgk6P8AoGcnm3D/hnrPMhr+cpQswS9Z5rTYibLf/h0IV46XmelgiAk+TTQR+GU630selYi6k4K4XK5h/hwLI5DBZuWB4zstPkHECUjn0OlLP48bn9zpk09FOr5/lp0QlLIJ4mvAie+3v6FAVTm9tENGSI+Wvw1NFC6Q78NT8FeHZWtSVdmYCgZsZf49ex4Zeq3EBBvJzuoWHHDvaXq7PePC61zpyjBAYFYhX/aFu8Gr6gGP1vq5hY7U68RDKKWrMbp+0/5JoYNUOFrRyoPGeIf0a/ZycPSvxelIKa184izxzKJZQ==
  • Arc-seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=jb6/6mtDTq7sXiL32odoLb3YYJUiPoN4E8kUAHtB2YMU8sO91T8CddulkDZvy5ciLou6nL1y/u/rbVj2LaDpBOrci+ataYYV0bzrpMWArmrc3v3nsfH8avimVyJIUCitwNqOx9rfjuXjY3mGNUzBljXVDUbzC/CgGjBP+KsamWYSYksLw9nHiIvh0MZbzUTHFg/bLqmxIY0QZYzea86P26A5P7zFTlT4oqFoa+qOlz07PXwG1Khdgen96FTavnrsENDxM0/pVe9aJThybXw8WfELj/Lxjna4f7S6ESnqopfgi37uIKMa+DHKD9toJ+mkemNPLRggD7oxO8ld4qcD9w==
  • Authentication-results: dkim=none (message not signed) header.d=none;dmarc=none action=none header.from=amd.com;
  • Cc: "Huang, Ray" <Ray.Huang@xxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Anthony PERARD <anthony.perard@xxxxxxxxxx>, "Orzel, Michal" <Michal.Orzel@xxxxxxx>, Julien Grall <julien@xxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
  • Delivery-date: Mon, 19 May 2025 08:37:12 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
  • Msip_labels: MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_ActionId=7c77b369-f1ed-460f-8fce-0b55394e74f5;MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_ContentBits=0;MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_Enabled=true;MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_Method=Privileged;MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_Name=Open Source;MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_SetDate=2025-05-19T08:36:37Z;MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_SiteId=3dd8961f-e488-4e60-8e11-a82d994e183d;MSIP_Label_f265efc6-e181-49d6-80f4-fae95cf838a0_Tag=10, 0, 1, 1;
  • Thread-index: AQHbrRCmtZ7pr/knH02upOrsNIOYE7O6sNeAgB8mXDA=
  • Thread-topic: [PATCH v4 05/15] xen/x86: introduce "cpufreq=amd-cppc" xen cmdline

[Public]

> -----Original Message-----
> From: Jan Beulich <jbeulich@xxxxxxxx>
> Sent: Tuesday, April 29, 2025 8:52 PM
> To: Penny, Zheng <penny.zheng@xxxxxxx>
> Cc: Huang, Ray <Ray.Huang@xxxxxxx>; Andrew Cooper
> <andrew.cooper3@xxxxxxxxxx>; Anthony PERARD <anthony.perard@xxxxxxxxxx>;
> Orzel, Michal <Michal.Orzel@xxxxxxx>; Julien Grall <julien@xxxxxxx>; Roger Pau
> Monné <roger.pau@xxxxxxxxxx>; Stefano Stabellini <sstabellini@xxxxxxxxxx>; 
> xen-
> devel@xxxxxxxxxxxxxxxxxxxx
> Subject: Re: [PATCH v4 05/15] xen/x86: introduce "cpufreq=amd-cppc" xen
> cmdline
>
> On 14.04.2025 09:40, Penny Zheng wrote:
> > --- a/xen/include/acpi/cpufreq/processor_perf.h
> > +++ b/xen/include/acpi/cpufreq/processor_perf.h
> > @@ -5,6 +5,9 @@
> >  #include <public/sysctl.h>
> >  #include <xen/acpi.h>
> >
> > +/* ability bits */
> > +#define XEN_PROCESSOR_PM_CPPC   8
>
> This needs correlating (at least via commentary, better by build-time 
> checking) with
> the other XEN_PROCESSOR_PM_* values. Otherwise someone adding a new
> #define in the public header may not (easily) notice a possible conflict. 
> With that in
> mind I also question whether 8 is actually a good choice: That's the obvious 
> next
> value to use in the public interface. SIF_PM_MASK is 8 bits wide, so a 
> sensible
> value to use here would by e.g. 0x100.
>

I've added a public flag anchor "XEN_PROCESSOR_PM_PUBLIC_END" in public header:
         #define XEN_PROCESSOR_PM_PUBLIC_END    XEN_PROCESSOR_PM_TX
and will do the following build-time checking:
        BUILD_BUG_ON(XEN_PROCESSOR_PM_CPPC <= XEN_PROCESSOR_PM_PUBLIC_END);

> Jan

 


Rackspace

Lists.xenproject.org is hosted with RackSpace, monitoring our
servers 24x7x365 and backed by RackSpace's Fanatical Support®.