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[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [PATCH v2 3/3] arm/mpu: Provide access to the MPU region from the C code
Hi Ayan,
If I understand correctly Armv8-R AArch32 supports up to 255 regions, so I
would expect ...
> /*
> * Armv8-R supports direct access and indirect access to the MPU regions
> through
> * registers:
> @@ -85,6 +87,7 @@ static void __init __maybe_unused build_assertions(void)
> */
> static void prepare_selector(uint8_t *sel)
> {
> +#ifdef CONFIG_ARM_64
> uint8_t cur_sel = *sel;
>
> /*
> @@ -98,7 +101,8 @@ static void prepare_selector(uint8_t *sel)
> WRITE_SYSREG(cur_sel, PRSELR_EL2);
> isb();
> }
> - *sel &= 0xFU;
> + *sel = *sel & 0xFU;
> +#endif
something here to check if the selector is 0-31 or not and:
- set the selector to 0 if set is 0-31
- set the selector to 32-255 if sel > 32
And ...
> }
>
> void read_protection_region(pr_t *pr_read, uint8_t sel)
> @@ -123,6 +127,24 @@ void read_protection_region(pr_t *pr_read, uint8_t sel)
> GENERATE_READ_PR_REG_CASE(13, pr_read);
> GENERATE_READ_PR_REG_CASE(14, pr_read);
> GENERATE_READ_PR_REG_CASE(15, pr_read);
> +#ifdef CONFIG_ARM_32
> + GENERATE_READ_PR_REG_CASE(16, pr_read);
> + GENERATE_READ_PR_REG_CASE(17, pr_read);
> + GENERATE_READ_PR_REG_CASE(18, pr_read);
> + GENERATE_READ_PR_REG_CASE(19, pr_read);
> + GENERATE_READ_PR_REG_CASE(20, pr_read);
> + GENERATE_READ_PR_REG_CASE(21, pr_read);
> + GENERATE_READ_PR_REG_CASE(22, pr_read);
> + GENERATE_READ_PR_REG_CASE(23, pr_read);
> + GENERATE_READ_PR_REG_CASE(24, pr_read);
> + GENERATE_READ_PR_REG_CASE(25, pr_read);
> + GENERATE_READ_PR_REG_CASE(26, pr_read);
> + GENERATE_READ_PR_REG_CASE(27, pr_read);
> + GENERATE_READ_PR_REG_CASE(28, pr_read);
> + GENERATE_READ_PR_REG_CASE(29, pr_read);
> + GENERATE_READ_PR_REG_CASE(30, pr_read);
> + GENERATE_READ_PR_REG_CASE(31, pr_read);
> +#endif
> default:
have something here for Arm32 to access the regions 32-255
> BUG(); /* Can't happen */
> break;
> @@ -151,6 +173,24 @@ void write_protection_region(const pr_t *pr_write,
> uint8_t sel)
> GENERATE_WRITE_PR_REG_CASE(13, pr_write);
> GENERATE_WRITE_PR_REG_CASE(14, pr_write);
> GENERATE_WRITE_PR_REG_CASE(15, pr_write);
> +#ifdef CONFIG_ARM_32
> + GENERATE_WRITE_PR_REG_CASE(16, pr_write);
> + GENERATE_WRITE_PR_REG_CASE(17, pr_write);
> + GENERATE_WRITE_PR_REG_CASE(18, pr_write);
> + GENERATE_WRITE_PR_REG_CASE(19, pr_write);
> + GENERATE_WRITE_PR_REG_CASE(20, pr_write);
> + GENERATE_WRITE_PR_REG_CASE(21, pr_write);
> + GENERATE_WRITE_PR_REG_CASE(22, pr_write);
> + GENERATE_WRITE_PR_REG_CASE(23, pr_write);
> + GENERATE_WRITE_PR_REG_CASE(24, pr_write);
> + GENERATE_WRITE_PR_REG_CASE(25, pr_write);
> + GENERATE_WRITE_PR_REG_CASE(26, pr_write);
> + GENERATE_WRITE_PR_REG_CASE(27, pr_write);
> + GENERATE_WRITE_PR_REG_CASE(28, pr_write);
> + GENERATE_WRITE_PR_REG_CASE(29, pr_write);
> + GENERATE_WRITE_PR_REG_CASE(30, pr_write);
> + GENERATE_WRITE_PR_REG_CASE(31, pr_write);
> +#endif
> default:
also here have something for Arm32 to access the regions 32-255
> BUG(); /* Can't happen */
> break;
Please let me know your thoughts.
Cheers,
Luca
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