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Re: [PATCH v5 1/4] xen/arm: Implement PSCI SYSTEM_SUSPEND call for guests



Hi Julien,

On Thu, Jul 3, 2025 at 1:57 AM Julien Grall <julien@xxxxxxx> wrote:
>
> Hi Mykola,
>
> On 02/07/2025 23:27, Mykola Kvach wrote:
> > On Wed, Jul 2, 2025 at 3:28 PM Julien Grall <julien@xxxxxxx> wrote:
> >> Why should we return an error? This is valid for a 64-bit domain to use
> >> SMC32 convention.
> >
> > I mean — in that case, is it possible that the upper 32 bits are set to
> > non-zero values without it being an explicit error from the guest?
> >
> > In my code, the macro used to extract 64-bit values (on 64-bit Xen, of
> > course) just copies values from the Xn registers directly.
> >
> > According to the SMC Calling Convention specification:
> > "System Software on ARM Platforms" (ARM DEN 0028A), we must use Wn
> > for SMC32 parameters in AArch64.
>
> The version A is more than 12 years old. You want to use the latest
> version. From the SMCCC DEN0028G [1] section 3.1 (Register use in
> AArch64 SMC and HVC calls):
>
> "
> The working size of the register is identified by its name:
> • Xn: All 64-bits are used.
> • Wn: The least significant 32-bits are used, and the most significant
> 32-bits are zero. Implementations must
> ignore the most significant bits.
> "

You're right — I should have referred to the latest version of the
specification. Thanks for pointing that out, and for the detailed review
and explanation. I appreciate your time!

>
> So...
>
> >
> > AFAIK, writing to Wn zeroes the top 32 bits of Xn. So, if the guest
> > is properly using 32-bit values for arguments, the upper bits will already
> > be zeroed.
>
> ... while the guest should write 0 in the top 32-bit, we should not
> reject not reject non-zero values nor do nothing. Instead we should
> ignore the top bits.
>
> Also, per the Arm Arm (ARM DDI 0487J.a) page D1-5406, it is
> implementation defined on whether the top 32-bits are zeroed when the
> previous exception context was AArch32. Xen will zero them on entry to
> avoid any surprise (see [2]), but that's only guarantee if this is a
> 32-bit domain (running either on 64-bit or 32-bit Xen) as SMC can only
> be called from EL1.
>
> As a side note, KVM is also ignoring the top 32-bits (see [3]).

Got it. I'll update the code to ignore the top 32 bits when an AArch64
domain issues SMC32 calls.

Thanks for the clarification!

>
> Cheers,
>
> [1] https://developer.arm.com/documentation/den0028/gbet0/?lang=en
> [2]
> https://xenbits.xen.org/gitweb/?p=xen.git;a=commit;h=32365f3476ac4655f2f26111cd7879912808cd77
> [3]
> https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/arch/arm64/kvm/psci.c#n223
>
> --
> Julien Grall
>

Best regards,
Mykola



 


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