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Re: [PATCH] x86/idle: Implement support for Meteor Lake
- To: Alex XZ Cypher Zero <me@xxxxxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Tue, 8 Jul 2025 10:46:12 +0200
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- Cc: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx
- Delivery-date: Tue, 08 Jul 2025 08:46:28 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 07.07.2025 21:30, Alex XZ Cypher Zero wrote:
> Adds support for Meteor Lake C-states. As the spec is identical to Alder Lake
> as per the Intel specs, I've reused the Alder Lake codepath.
Changes like this want to be done by pulling in respective Linux commits,
where available. Where not available, things need clarifying with more
detail. In particular here, "the spec is identical" doesn't look to match
what was done on the Linux side.
I think I need to go and pick up a number of Linux commits ...
Jan
> --- a/xen/arch/x86/cpu/mwait-idle.c
> +++ b/xen/arch/x86/cpu/mwait-idle.c
> @@ -1148,6 +1148,8 @@ static const struct x86_cpu_id intel_idle_ids[]
> __initconstrel = {
> ICPU(ICELAKE_D, icx),
> ICPU(ALDERLAKE, adl),
> ICPU(ALDERLAKE_L, adl_l),
> + ICPU(METEORLAKE, adl),
> + ICPU(METEORLAKE_L, adl_l)
> ICPU(SAPPHIRERAPIDS_X, spr),
> ICPU(ATOM_GOLDMONT, bxt),
> ICPU(ATOM_GOLDMONT_PLUS, bxt),
> @@ -1386,6 +1388,8 @@ static void __init mwait_idle_state_table_update(void)
> break;
> case INTEL_FAM6_ALDERLAKE:
> case INTEL_FAM6_ALDERLAKE_L:
> + case INTEL_FAM6_METEORLAKE:
> + case INTEL_FAM6_METEORLAKE_L:
> adl_idle_state_table_update();
> break;
> }
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