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Re: [PATCH v2 07/10] xen/arm: gicv3: modify ICH_LR_PHYSICAL_MASK to allow eSPI processing
- To: Leonid Komarianskyi <Leonid_Komarianskyi@xxxxxxxx>
- From: Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>
- Date: Thu, 21 Aug 2025 16:27:26 +0000
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- Cc: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Julien Grall <julien@xxxxxxx>, Bertrand Marquis <bertrand.marquis@xxxxxxx>, Michal Orzel <michal.orzel@xxxxxxx>
- Delivery-date: Thu, 21 Aug 2025 16:27:42 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
- Thread-index: AQHcB5d+mzEvAktxmEWCQ8jbw0fsdA==
- Thread-topic: [PATCH v2 07/10] xen/arm: gicv3: modify ICH_LR_PHYSICAL_MASK to allow eSPI processing
Hi Leonid,
Leonid Komarianskyi <Leonid_Komarianskyi@xxxxxxxx> writes:
> To properly deactivate guest interrupts and allow them to be retriggered
> after the initial trigger, the LR needs to be updated. The current
> implementation ignores interrupts outside the range specified by the mask
> 0x3FF, which only covers IRQ numbers up to 1023. To enable processing of
> eSPI interrupts, this patch updates the mask to 0x13FF.
I am not sure how this supposed to work. According to the arch
specification, pINTID field in ICH_LR<n>_EL2 is only 12 bits wide.
--
WBR, Volodymyr
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