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Re: [Xen-devel] [PATCH 1/2 v5] iommu/amd: Fix logic for clearing the IOMMU interrupt bits

On 6/13/2013 2:54 AM, Jan Beulich wrote:
On 13.06.13 at 03:44, Suravee Suthikulpanit <suravee.suthikulpanit@xxxxxxx> wrote:
On 6/12/2013 5:37 PM, Suravee Suthikulpanit wrote:
Since we are modifying the IOMMU interrupt enabling/disabling, I have 
been doing some more testing on the IOMMU interrupt handling. I found 
that IOMMU MSI interrupt is currently broken, but I think this is 
because of some older changes.  I am still tracking down the issue, 
and will update my findings.
The following commit broke the IOMMU MSI interrupt:

2012-11-28    899110e3f6d2a191638e8b50a981c551eeec49e6 AMD IOMMU: 
include IOMMU interrupt information in 'M' debug key output

This patch also need the following patch to resolve kernel panic:

c759fee45bf44f2947a3480d54c03ff7e028c39e AMD IOMMU: add locking missing 
from c/s 26198:ba90ecb0231f

I'll update once I root cause the issue.
I'll also take a look, but it would help to know in what way it is
broken: Some sort of crash, no interrupt delivered, ... This surely
needs to be resolved before 4.3 can go out - George, can you put
this on your bug list, please?


Basically I am not seeing any interrupts coming in from the IOMMU.  I was testing it by setting the 
ComWaitIntEn bit of the IOMMU control register to let the IOMMU hardware generate MSI interrupts for
the COMPLETION_WAIT command.  I am not seeing any interrupts (i.e. The interrupt handler and
tasklet handler function is never executed).  I have double checked this in the latest Xen-4.2.x, and they
are working fine.  The same MSI interrupt is also used for PPR and Event Log.

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