[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v10 03/19] qspinlock: Add pending bit
On Wed, May 14, 2014 at 06:51:24PM +0200, Radim KrÄmÃÅ wrote: > Ok. > I've seen merit in pvqspinlock even with slightly slower first-waiter, > so I would have happily sacrificed those horrible branches. > (I prefer elegant to optimized code, but I can see why we want to be > strictly better than ticketlock.) > Peter mentioned that we are focusing on bare-metal patches, so I'll > withold my other paravirt rants until they are polished. Well, paravirt must happen too, but comes later in this series, patch 3 which we're replying to is still very much in the bare metal part of the series. I've not had time yet to decode all that Waiman has done to make paravirt work. But as a general rule I like patches that start with something simple and working and then optimize it, this series doesn't seem to quite grasp that. > And to forcefully bring this thread a little bit on-topic: > > Pending-bit is effectively a lock in a lock, so I was wondering why > don't we use more pending bits; advantages are the same, just diminished > by the probability of having an ideally contended lock: > - waiter won't be blocked on RAM access if critical section (or more) > ends sooner > - some unlucky cacheline is not forgotten > - faster unlock (no need for tail operations) > (- ?) > disadvantages are magnified: > - increased complexity > - intense cacheline sharing > (I thought that this is the main disadvantage of ticketlock.) > (- ?) > > One bit still improved performance, is it the best we got? So, the advantage of one bit is that if we use a whole byte for 1 bit we can avoid some atomic ops. The entire reason for this in-word spinner is to amortize the cost of hitting the external node cacheline. So traditional locks like test-and-test and the ticket lock only ever access the spinlock word itsef, this MCS style queueing lock has a second (and, see my other rants in this thread, when done wrong more than 2) cacheline to touch. That said, all our benchmarking is pretty much for the cache-hot case, so I'm not entirely convinced yet that the one pending bit makes up for it, it does in the cache-hot case. But... writing cache-cold benchmarks is _hard_ :/ Attachment:
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