[Xen-devel] [PATCH 1/2] xen: arm: sort earlyprintk related lists

[Ian Campbell <ian.campbell@xxxxxxxxxx>]

Also add a bunch of missing entries to the doc

Signed-off-by: Ian Campbell <ian.campbell@xxxxxxxxxx>
---
 docs/misc/arm/early-printk.txt |   16 ++++++----
 xen/arch/arm/Rules.mk          |   68 +++++++++++++++++++---------------------
 2 files changed, 43 insertions(+), 41 deletions(-)

diff --git a/docs/misc/arm/early-printk.txt b/docs/misc/arm/early-printk.txt
index 710f07e..44df35e 100644
--- a/docs/misc/arm/early-printk.txt
+++ b/docs/misc/arm/early-printk.txt
@@ -9,18 +9,22 @@ option should not be enable for Xens that are intended to be 
portable.
 
 CONFIG_EARLY_PRINTK=mach
 where mach is the name of the machine:
-  - vexpress: printk with pl011 for versatile express
+  - brcm: printk with 8250 on Broadcom 7445D0 boards with A15 processors.
+  - dra7: printk with 8250 on DRA7 platform
   - exynos5250: printk with the second UART
-  - midway: printk with the pl011 on Calxeda Midway processors
   - fastmodel: printk on ARM Fastmodel software emulators
+  - hip04-d01: printk with 8250 on HiSilicon Hip-04 D01
+  - juno: printk with pl011 on Juno platform
+  - lager: printk with SCIF0 on Renesas R-Car H2 processors
+  - midway: printk with the pl011 on Calxeda Midway processors
   - omap5432: printk with UART3 on TI OMAP5432 processors
+  - seattle: printk with pl011 for AMD Seattle processor
   - sun6i: printk with 8250 on Allwinner A31 processors
   - sun7i: printk with 8250 on Allwinner A20 processors
-  - brcm: printk with 8250 on Broadcom 7445D0 boards with A15 processors.
-  - hip04-d01: printk with 8250 on HiSilicon Hip-04 D01
-  - seattle: printk with pl011 for AMD Seattle processor
-  - lager: printk with SCIF0 on Renesas R-Car H2 processors
   - thunderx: printk with pl011 for Cavium ThunderX processor
+  - vexpress: printk with pl011 for versatile express
+  - xgene-mcdivitt: printk with 820 on Xgene mcdivitt platform
+  - xgene-storm: printk with 820 on Xgene storm platform
   - zynqmp: printk with Cadence UART for Xilinx ZynqMP SoCs
 
 The base address and baud rate is hardcoded in xen/arch/arm/Rules.mk,
diff --git a/xen/arch/arm/Rules.mk b/xen/arch/arm/Rules.mk
index 818a5bc..af3448b 100644
--- a/xen/arch/arm/Rules.mk
+++ b/xen/arch/arm/Rules.mk
@@ -42,10 +42,15 @@ EARLY_PRINTK := n
 
 ifeq ($(debug),y)
 
-# Early printk for versatile express
-ifeq ($(CONFIG_EARLY_PRINTK), vexpress)
-EARLY_PRINTK_INC := pl011
-EARLY_UART_BASE_ADDRESS := 0x1c090000
+ifeq ($(CONFIG_EARLY_PRINTK), brcm)
+EARLY_PRINTK_INC := 8250
+EARLY_UART_BASE_ADDRESS := 0xF040AB00
+EARLY_UART_REG_SHIFT := 2
+endif
+ifeq ($(CONFIG_EARLY_PRINTK), dra7)
+EARLY_PRINTK_INC := 8250
+EARLY_UART_BASE_ADDRESS := 0x4806A000
+EARLY_UART_REG_SHIFT := 2
 endif
 ifeq ($(CONFIG_EARLY_PRINTK), fastmodel)
 EARLY_PRINTK_INC := pl011
@@ -57,6 +62,19 @@ ifeq ($(CONFIG_EARLY_PRINTK), exynos5250)
 EARLY_PRINTK_INC := exynos4210
 EARLY_UART_BASE_ADDRESS := 0x12c20000
 endif
+ifeq ($(CONFIG_EARLY_PRINTK), hip04-d01)
+EARLY_PRINTK_INC := 8250
+EARLY_UART_BASE_ADDRESS := 0xE4007000
+EARLY_UART_REG_SHIFT := 2
+endif
+ifeq ($(CONFIG_EARLY_PRINTK), juno)
+EARLY_PRINTK_INC := pl011
+EARLY_UART_BASE_ADDRESS := 0x7ff80000
+endif
+ifeq ($(CONFIG_EARLY_PRINTK), lager)
+EARLY_PRINTK_INC := scif
+EARLY_UART_BASE_ADDRESS := 0xe6e60000
+endif
 ifeq ($(CONFIG_EARLY_PRINTK), midway)
 EARLY_PRINTK_INC := pl011
 EARLY_UART_BASE_ADDRESS := 0xfff36000
@@ -66,10 +84,9 @@ EARLY_PRINTK_INC := 8250
 EARLY_UART_BASE_ADDRESS := 0x48020000
 EARLY_UART_REG_SHIFT := 2
 endif
-ifeq ($(CONFIG_EARLY_PRINTK), dra7)
-EARLY_PRINTK_INC := 8250
-EARLY_UART_BASE_ADDRESS := 0x4806A000
-EARLY_UART_REG_SHIFT := 2
+ifeq ($(CONFIG_EARLY_PRINTK), seattle)
+EARLY_PRINTK_INC := pl011
+EARLY_UART_BASE_ADDRESS := 0xe1010000
 endif
 ifeq ($(CONFIG_EARLY_PRINTK), sun6i)
 EARLY_PRINTK_INC := 8250
@@ -81,43 +98,24 @@ EARLY_PRINTK_INC := 8250
 EARLY_UART_BASE_ADDRESS := 0x01c28000
 EARLY_UART_REG_SHIFT := 2
 endif
-ifeq ($(CONFIG_EARLY_PRINTK), brcm)
-EARLY_PRINTK_INC := 8250
-EARLY_UART_BASE_ADDRESS := 0xF040AB00
-EARLY_UART_REG_SHIFT := 2
+ifeq ($(CONFIG_EARLY_PRINTK), thunderx)
+EARLY_PRINTK_INC := pl011
+EARLY_UART_BASE_ADDRESS := 0x87e024000000
 endif
-ifeq ($(CONFIG_EARLY_PRINTK), xgene-storm)
-EARLY_PRINTK_INC := 8250
-EARLY_UART_BASE_ADDRESS := 0x1c020000
-EARLY_UART_REG_SHIFT := 2
+ifeq ($(CONFIG_EARLY_PRINTK), vexpress)
+EARLY_PRINTK_INC := pl011
+EARLY_UART_BASE_ADDRESS := 0x1c090000
 endif
 ifeq ($(CONFIG_EARLY_PRINTK), xgene-mcdivitt)
 EARLY_PRINTK_INC := 8250
 EARLY_UART_BASE_ADDRESS := 0x1c021000
 EARLY_UART_REG_SHIFT := 2
 endif
-ifeq ($(CONFIG_EARLY_PRINTK), juno)
-EARLY_PRINTK_INC := pl011
-EARLY_UART_BASE_ADDRESS := 0x7ff80000
-endif
-ifeq ($(CONFIG_EARLY_PRINTK), hip04-d01)
+ifeq ($(CONFIG_EARLY_PRINTK), xgene-storm)
 EARLY_PRINTK_INC := 8250
-EARLY_UART_BASE_ADDRESS := 0xE4007000
+EARLY_UART_BASE_ADDRESS := 0x1c020000
 EARLY_UART_REG_SHIFT := 2
 endif
-ifeq ($(CONFIG_EARLY_PRINTK), seattle)
-EARLY_PRINTK_INC := pl011
-EARLY_UART_BASE_ADDRESS := 0xe1010000
-endif
-ifeq ($(CONFIG_EARLY_PRINTK), lager)
-EARLY_PRINTK_INC := scif
-EARLY_UART_BASE_ADDRESS := 0xe6e60000
-endif
-ifeq ($(CONFIG_EARLY_PRINTK), thunderx)
-EARLY_PRINTK_INC := pl011
-EARLY_UART_BASE_ADDRESS := 0x87e024000000
-endif
-
 ifeq ($(CONFIG_EARLY_PRINTK), zynqmp)
 EARLY_PRINTK_INC := cadence
 EARLY_PRINTK_BAUD := 115200
-- 
1.7.10.4


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