Re: [Xen-devel] [PATCH] ns16550: limit mapped MMIO size

[Ian Campbell <ian.campbell@xxxxxxxxxx>]

On Thu, 2015-11-12 at 08:52 -0700, Jan Beulich wrote:
> There's no point in mapping more than the memory we actually may need
> to touch, and in fact the too large region could actually extend into
> another device's one (which currently is benign on x86 since only a
> single page gets mapped anyway, but which is a latent bug on ARM
> whenever PCI support gets enabled there).
> 
> Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx>
> 
> --- a/xen/drivers/char/ns16550.c
> +++ b/xen/drivers/char/ns16550.c
> @@ -931,6 +931,8 @@ pci_uart_config (struct ns16550 *uart, i
> ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂuart->io_base += bar_idx *
> uart_param[p].uart_offset;
> ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂif ( uart_param[p].base_baud )
> ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂuart->clock_hz = uart_param[p].base_baud *
> 16;
> +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂsize = max(8U << uart_param[p].reg_shift,
> +ÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂÂuart_param[p].uart_offset);

I assume 8 bytes (suitably shifted as above) corresponds to the "need to
touch" set of registers, but I can't fathom the link to uart_offset, rather
than uart_offset + those 8 bytes or something like that.

Ian.
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