[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH] X86/VPMU: mask off uncore overflow bit on xeon phi knights landing
>>> On 09.12.16 at 04:17, <luwei.kang@xxxxxxxxx> wrote: > IA32_PERF_GLOBAL_STATUS.OvfUncore (MSR 38EH, bit[61]) is always 0 and > writing 1 to IA32_PERF_GLOBAL_OVF_CTRL.ClrOvfUncore (MSR 390H, bit[61]) > signals #GP. > Reference "Intel Xeon Phi Procssor x200 Product Family", document > number 334646-008. I can see this being a necessary workaround, but going over the other errata there are some of quite a bit higher importance to work around (KNL13) or at least check whether we're affected (KNL4, KNL8), if we really care about supporting Xen on this processor model. I'd appreciate other opinions namely from the people on Cc. Jan _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx https://lists.xen.org/xen-devel
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