Re: [Xen-devel] [PATCH] X86/VPMU: mask off uncore overflow bit on xeon phi knights landing

["Tian, Kevin" <kevin.tian@xxxxxxxxx>]

> From: Jan Beulich [mailto:JBeulich@xxxxxxxx]
> Sent: Friday, December 09, 2016 5:43 PM
ing
> 
> >>> On 09.12.16 at 04:17, <luwei.kang@xxxxxxxxx> wrote:
> > IA32_PERF_GLOBAL_STATUS.OvfUncore (MSR 38EH, bit[61]) is always 0 and
> > writing 1 to IA32_PERF_GLOBAL_OVF_CTRL.ClrOvfUncore (MSR 390H, bit[61])
> > signals #GP.
> > Reference "Intel Xeon Phi Procssor x200 Product Family", document
> > number 334646-008.
> 
> I can see this being a necessary workaround, but going over the
> other errata there are some of quite a bit higher importance to
> work around (KNL13) or at least check whether we're affected
> (KNL4, KNL8), if we really care about supporting Xen on this
> processor model. I'd appreciate other opinions namely from the
> people on Cc.
> 

I haven't looked at above errata in detail. Luwei, can you plan 
them accordingly to make sure we have a good support here?
If there's any technical issue on workaround, please just raise
it up. :-)

Thanks
Kevin

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