[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH v13 13/23] x86: refactor psr: CDP: implement CPU init flow.
This patch implements the CPU init flow for CDP. The flow is almost same as L3 CAT. Note: CDP does NOT work until you apply the later patches of CDP. "x86: refactor psr: CDP: implement get hw info flow." "x86: refactor psr: CDP: implement set value callback function." Signed-off-by: Yi Sun <yi.y.sun@xxxxxxxxxxxxxxx> --- v13: - add commit message. (suggested by Jan Beulich) - fix comment issue. (suggested by Jan Beulich) - set CDP default value before enabling it. (suggested by Jan Beulich) - remove unnecessary check. (suggested by Jan Beulich) - set 'alt_type' for CDP. (suggested by Jan Beulich) - check 'cos_max' and substract 1 before right shift it to get correct value. (suggested by Jan Beulich) v12: - move 'type[]' assignment into l3_cdp_props declaration to make it be 'const'. (suggested by Jan Beulich) - remove "L2 CAT" indication in printk. (suggested by Jan Beulich) - fix coding style issue. (suggested by Jan Beulich) - change 'val' type to uint64_t. (suggested by Jan Beulich) - use 1ull. (suggested by Jan Beulich) - restore mask(0) MSR to default value. (suggested by Jan Beulich) v11: - changes about 'feat_props'. (suggested by Jan Beulich) - remove MSR restore action which is unnecessary. (suggested by Jan Beulich) - modify commit message. v10: - fix comment. (suggested by Jan Beulich) - use swith in 'cat_init_feature' to handle different feature types. (suggested by Jan Beulich) - changes about 'props'. (suggested by Jan Beulich) - restore MSRs to default value when cpu online. (suggested by Jan Beulich) - remove feat_mask. (suggested by Jan Beulich) v9: - modify commit message to describe flow clearer. - handle cpu offline and online again case to read MSRs registers values back and save them into cos array to make user can get real data. - modify error handling process in 'psr_cpu_prepare' to reduce redundant codes. - modify 'get_cdp_data' and 'get_cdp_code' to make them standard. (suggested by Roger Pau and Jan Beulich) - encapsulate CDP operations into 'cat_init_feature' to reduce redundant codes. (suggested by Roger Pau) - reuse 'cat_get_cos_max' for CDP. (suggested by Roger Pau) - handle 'PSR_CDP' in psr_presmp_init to make init work can be done when there is only 'psr=cdp' in cmdline. - remove unnecessary comment. (suggested by Jan Beulich) - move CDP related codes in 'cpu_init_work' into 'psr_cpu_init'. (suggested by Jan Beulich) - add codes to handle CDP's 'cos_num'. (suggested by Jan Beulich) - fix coding style issue. (suggested by Jan Beulich) - do not free resources when allocation fails in 'psr_cpu_prepare'. (suggested by Jan Beulich) - changes about 'uint64_t' to 'uint32_t'. (suggested by Jan Beulich) v7: - initialize 'l3_cdp'. (suggested by Konrad Rzeszutek Wilk) v6: - use 'cpuid_leaf'. (suggested by Konrad Rzeszutek Wilk and Jan Beulich) v5: - remove codes to free 'feat_l3_cdp' in 'free_feature'. (suggested by Jan Beulich) - encapsulate cpuid registers into 'struct cpuid_leaf_regs'. (suggested by Jan Beulich) - print socket info when 'opt_cpu_info' is true. (suggested by Jan Beulich) - rename 'l3_cdp_get_max_cos_max' to 'l3_cdp_get_cos_max'. (suggested by Jan Beulich) - rename 'dat[]' to 'data[]'. (suggested by Jan Beulich) - move 'cpu_prepare_work' contents into 'psr_cpu_prepare'. (suggested by Jan Beulich) v4: - create this patch to make codes easier to understand. (suggested by Jan Beulich) --- xen/arch/x86/psr.c | 77 +++++++++++++++++++++++++++++++++++++++++++++++++----- 1 file changed, 70 insertions(+), 7 deletions(-) diff --git a/xen/arch/x86/psr.c b/xen/arch/x86/psr.c index 48dab60..13d5c2f 100644 --- a/xen/arch/x86/psr.c +++ b/xen/arch/x86/psr.c @@ -62,6 +62,7 @@ enum psr_feat_type { FEAT_TYPE_L3_CAT, + FEAT_TYPE_L3_CDP, FEAT_TYPE_NUM, FEAT_TYPE_UNKNOWN, }; @@ -158,11 +159,28 @@ static DEFINE_PER_CPU(struct psr_assoc, psr_assoc); * array creation. It is used to transiently store a spare node. */ static struct feat_node *feat_l3_cat; +static struct feat_node *feat_l3_cdp; /* Common functions */ #define cat_default_val(len) (0xffffffff >> (32 - (len))) /* + * get_cdp_data - get DATA COS register value from input COS ID. + * @feat: the feature node. + * @cos: the COS ID. + */ +#define get_cdp_data(feat, cos) \ + ((feat)->cos_reg_val[(cos) * 2]) + +/* + * get_cdp_code - get CODE COS register value from input COS ID. + * @feat: the feature node. + * @cos: the COS ID. + */ +#define get_cdp_code(feat, cos) \ + ((feat)->cos_reg_val[(cos) * 2 + 1]) + +/* * Use this function to check if any allocation feature has been enabled * in cmdline. */ @@ -262,6 +280,29 @@ static int cat_init_feature(const struct cpuid_leaf *regs, break; + case FEAT_TYPE_L3_CDP: + { + uint64_t val; + + if ( feat->cos_max < 3 ) + return -ENOENT; + + /* Cut half of cos_max when CDP is enabled. */ + feat->cos_max = (feat->cos_max - 1) >> 1; + + /* We reserve cos=0 as default cbm (all bits within cbm_len are 1). */ + get_cdp_code(feat, 0) = cat_default_val(feat->cbm_len); + get_cdp_data(feat, 0) = cat_default_val(feat->cbm_len); + + wrmsrl(MSR_IA32_PSR_L3_MASK(0), cat_default_val(feat->cbm_len)); + wrmsrl(MSR_IA32_PSR_L3_MASK(1), cat_default_val(feat->cbm_len)); + rdmsrl(MSR_IA32_PSR_L3_QOS_CFG, val); + wrmsrl(MSR_IA32_PSR_L3_QOS_CFG, + val | (1ull << PSR_L3_QOS_CDP_ENABLE_BIT)); + + break; + } + default: return -ENOENT; } @@ -272,7 +313,8 @@ static int cat_init_feature(const struct cpuid_leaf *regs, if ( !opt_cpu_info ) return 0; - printk(XENLOG_INFO "CAT: enabled on socket %u, cos_max:%u, cbm_len:%u\n", + printk(XENLOG_INFO "%s: enabled on socket %u, cos_max:%u, cbm_len:%u\n", + ((type == FEAT_TYPE_L3_CDP) ? "CDP" : "L3 CAT"), cpu_to_socket(smp_processor_id()), feat->cos_max, feat->cbm_len); return 0; @@ -305,6 +347,14 @@ static const struct feat_props l3_cat_props = { .write_msr = l3_cat_write_msr, }; +/* L3 CDP props */ +static const struct feat_props l3_cdp_props = { + .cos_num = 2, + .type[0] = PSR_CBM_TYPE_L3_DATA, + .type[1] = PSR_CBM_TYPE_L3_CODE, + .alt_type = FEAT_TYPE_L3_CAT, +}; + static void __init parse_psr_bool(char *s, char *value, char *feature, unsigned int mask) { @@ -1246,6 +1296,10 @@ static int psr_cpu_prepare(void) (feat_l3_cat = xzalloc(struct feat_node)) == NULL ) return -ENOMEM; + if ( feat_l3_cdp == NULL && + (feat_l3_cdp = xzalloc(struct feat_node)) == NULL ) + return -ENOMEM; + return 0; } @@ -1277,11 +1331,20 @@ static void psr_cpu_init(void) { cpuid_count_leaf(PSR_CPUID_LEVEL_CAT, 1, ®s); - feat = feat_l3_cat; - feat_l3_cat = NULL; - - if ( !cat_init_feature(®s, feat, info, FEAT_TYPE_L3_CAT) ) - feat_props[FEAT_TYPE_L3_CAT] = &l3_cat_props; + if ( (regs.c & PSR_CAT_CDP_CAPABILITY) && (opt_psr & PSR_CDP) ) + { + feat = feat_l3_cdp; + feat_l3_cdp = NULL; + if ( !cat_init_feature(®s, feat, info, FEAT_TYPE_L3_CDP) ) + feat_props[FEAT_TYPE_L3_CDP] = &l3_cdp_props; + } + else + { + feat = feat_l3_cat; + feat_l3_cat = NULL; + if ( !cat_init_feature(®s, feat, info, FEAT_TYPE_L3_CAT) ) + feat_props[FEAT_TYPE_L3_CAT] = &l3_cat_props; + } } info->feat_init = true; @@ -1343,7 +1406,7 @@ static int __init psr_presmp_init(void) if ( (opt_psr & PSR_CMT) && opt_rmid_max ) init_psr_cmt(opt_rmid_max); - if ( opt_psr & PSR_CAT ) + if ( opt_psr & (PSR_CAT | PSR_CDP) ) init_psr(); if ( psr_cpu_prepare() ) -- 1.9.1 _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx https://lists.xen.org/xen-devel
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