[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH] x86/cpu: Support a new cpu vendor, which is Shanghai. Shanghai cpu defines two msr registers to enable Random Number Generator and Advanced Cryprography Engine.The cpu supports iommu, which is designed according to Intel's specification.
On Fri, Mar 23, 2018 at 07:28:56PM +0800, Fionali wrote: > From: FionaLi <FionaLi@xxxxxxxxxxx> > > Signed-off-by: Fiona Li<fionali@xxxxxxxxxxx> > --- > xen/arch/x86/cpu/Makefile | 1 + > xen/arch/x86/cpu/common.c | 1 + > xen/arch/x86/cpu/shanghai.c | 61 > +++++++++++++++++++++++++++++++++++++++ > xen/include/asm-x86/iommu.h | 2 ++ > xen/include/asm-x86/msr-index.h | 4 +++ > xen/include/asm-x86/setup.h | 1 + > xen/include/asm-x86/x86-vendors.h | 3 +- > 7 files changed, 72 insertions(+), 1 deletion(-) > create mode 100644 xen/arch/x86/cpu/shanghai.c > > diff --git a/xen/arch/x86/cpu/Makefile b/xen/arch/x86/cpu/Makefile > index 74f23ae..8fcffdd 100644 > --- a/xen/arch/x86/cpu/Makefile > +++ b/xen/arch/x86/cpu/Makefile > @@ -5,6 +5,7 @@ obj-y += amd.o > obj-y += centaur.o > obj-y += common.o > obj-y += intel.o > +obj-y += shanghai.o I'm confused. Shouldn't you use zhaoxin instead? Wei. _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxxxxxxxxx https://lists.xenproject.org/mailman/listinfo/xen-devel
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