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Re: [Xen-devel] [PATCH RFC] x86emul: unconditionally deliver #UD for LWP insns


  • To: Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
  • From: Jan Beulich <JBeulich@xxxxxxxx>
  • Date: Thu, 18 Jul 2019 09:18:41 +0000
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  • Cc: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, Roger Pau Monné <roger.pau@xxxxxxxxxx>
  • Delivery-date: Thu, 18 Jul 2019 09:19:25 +0000
  • List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
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  • Thread-topic: [PATCH RFC] x86emul: unconditionally deliver #UD for LWP insns

On 17.07.2019 19:09, Andrew Cooper wrote:
> On 17/07/2019 14:07, Jan Beulich wrote:
>> On 17.07.2019 13:42, Andrew Cooper wrote:
>>> On 17/07/2019 07:42, Jan Beulich wrote:
>>>> With AMD apparently having abandoned XOP encoded insns, another option
>>>> would seem to be to simply wire all unrecognized ones into #UD (rather
>>>> then returning UNIMPLEMENTED/UNRECOGNIZED).
>>> There are still some XOP instructions which actually work on Fam17h
>>> processors, if you ignore CPUID and go blindly executing.
>>>
>>> Given no official statement that XOP is dead, I'd keep the support we
>>> currently have.
>> Then my remark wasn't clear enough: I'm not suggesting to rip out
>> XOP insn support we have. I'm instead considering whether to wire
>> all unsupported XOP encodings into #UD (rather than return
>> UNIMPLEMENTED/UNRECOGNIZED for them), not just the LWP ones.
> 
> Ah, in which case, no.  Turning all unknown instructions into
> EXCEPTION/#UD will break introspection, which uses UNRECOGNISED to cover
> the gaps in the emulator by single-stepping the vcpu.

But there are no gaps: The only ones we didn't cover (afaik) were the
LWP ones, and those would get made raise #UD by the patch here anyway.
If there are really opcodes where "unrecognized" is relevant, then we
should special case _those_ imo, rather than leaving an opcode space
which apparently won't see further extensions all go the "unrecognized"
route.

Jan
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