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Re: [Xen-devel] [PATCH 2/2] x86/iommu: avoid mapping the APIC configuration space for hwdom


  • To: Roger Pau Monne <roger.pau@xxxxxxxxxx>
  • From: Jan Beulich <JBeulich@xxxxxxxx>
  • Date: Tue, 23 Jul 2019 16:09:38 +0000
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  • Cc: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>
  • Delivery-date: Tue, 23 Jul 2019 16:15:50 +0000
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  • Thread-topic: [PATCH 2/2] x86/iommu: avoid mapping the APIC configuration space for hwdom

On 23.07.2019 17:48, Roger Pau Monne wrote:
> Current code only prevents mapping the io-apic page into the guest
> physical memory map. Expand the range to be 0xFECx_xxxx as described
> in the Intel 3 Series Chipset Datasheet section 3.3.1 "APIC
> Configuration Space (FEC0_0000h–FECF_FFFFh)".
> 
> AMD also lists this address range in the AMD SR5690 Databook, section
> 2.4.2 "Non-SB IOAPIC Support".

But that's chipset specific. I don't think we can blindly assume
this range. Just in case one small remark on the change itself as
well:

> @@ -229,10 +229,9 @@ static bool __hwdom_init hwdom_iommu_map(const struct 
> domain *d,
>       /* Check that it doesn't overlap with the Interrupt Address Range. */
>       if ( pfn >= 0xfee00 && pfn <= 0xfeeff )
>           return false;
> -    /* ... or the IO-APIC */
> -    for ( i = 0; has_vioapic(d) && i < d->arch.hvm.nr_vioapics; i++ )
> -        if ( pfn == PFN_DOWN(domain_vioapic(d, i)->base_address) )
> -            return false;
> +    /* ... or the APIC Configuration Space. */
> +    if ( pfn >= 0xfec00 && pfn <= 0xfecff )
> +        return false;

Despite the chipset documentation calling it just APIC, in our
code I think it would be better if a connection to IO-APIC was
made, to avoid ambiguity.

Jan
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