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Re: [PATCH] x86/mm: account for PGT_pae_xen_l2 in recently added assertion


  • To: Jan Beulich <jbeulich@xxxxxxxx>
  • From: Andrew Cooper <Andrew.Cooper3@xxxxxxxxxx>
  • Date: Fri, 10 Jun 2022 08:36:57 +0000
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  • Cc: Wei Liu <wl@xxxxxxx>, Roger Pau Monne <roger.pau@xxxxxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
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  • Thread-topic: [PATCH] x86/mm: account for PGT_pae_xen_l2 in recently added assertion

On 10/06/2022 09:17, Jan Beulich wrote:
> On 10.06.2022 10:12, Andrew Cooper wrote:
>> On 10/06/2022 08:26, Jan Beulich wrote:
>>> ---
>>> The check around the TLB flush which was moved for XSA-401 also looks to
>>> needlessly trigger a flush when "type" has the bit set (while "x"
>>> wouldn't). That's no different from original behavior, but still looks
>>> inefficient.
>> It's not the only inefficiency here.  Still plenty of improvements to be
>> had in _get_page_type().
> You did say you have some follow-up changes pending. It wasn't clear to
> me whether this particular aspect was among them. If not, I can make
> a(nother) patch ...

At this point, it's probably more accurate to say that I've got a pile
of plans about making improvements, rather than a pile of patches.

The major improvement is the early exit for PGT_validated, making the
second half of the function exclusively for the validate-locked state.

Other improvements (off the top of my head) are shuffling the TLB flush
setup logic to not even do the tlb filter calculations if we're going to
skip the flush call anyway, deduping the page_get_owner()
calls/variables, sorting out PGC_page_table naming/semantics, reducing
the number of redundant ways we've got of expressing the same logic
(there are a lot of invariants between x, nx and type), better
explanation of the iommu behaviour, and better explanation of the tlb
flushing safety requirements.

If you think some of that's easy enough to do, then feel free.

~Andrew

 


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