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Re: [PATCH] x86/pvh: do not forward MADT Local APIC NMI structures to dom0


  • To: Andrew Cooper <Andrew.Cooper3@xxxxxxxxxx>
  • From: Roger Pau Monné <roger.pau@xxxxxxxxxx>
  • Date: Wed, 16 Nov 2022 18:25:52 +0100
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  • Cc: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>, Jan Beulich <jbeulich@xxxxxxxx>, Wei Liu <wl@xxxxxxx>
  • Delivery-date: Wed, 16 Nov 2022 17:26:16 +0000
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On Wed, Nov 16, 2022 at 04:56:41PM +0000, Andrew Cooper wrote:
> On 16/11/2022 16:42, Roger Pau Monne wrote:
> > Currently Xen will passthrough any Local APIC NMI Structure found in
> > the native ACPI MADT table to a PVH dom0.  This is wrong because PVH
> > doesn't have access to the physical local APIC, and instead gets an
> > emulated local APIC by Xen, that doesn't have the LINT0 or LINT1
> > pins wired to anything.  Furthermore the ACPI Processor UIDs used in
> > the APIC NMI Structures are likely to not match the ones generated by
> > Xen for the Local x2APIC Structures, creating confusion to dom0.
> >
> > Fix this by removing the logic to passthrough the Local APIC NMI
> > Structure for PVH dom0.
> >
> > Fixes: 1d74282c45 ('x86: setup PVHv2 Dom0 ACPI tables')
> > Signed-off-by: Roger Pau Monné <roger.pau@xxxxxxxxxx>
> 
> Yeah, that was never going to work correctly.
> 
> That said, I'm not certain we can get away with discarding them either. 
> Some systems really do use ExtINT in IO-APIC entries, and dom0 is
> capable of configuring this if it thinks it wants virtual wire mode.

But the MADT entries discussed here (Local APIC NMI Structure) deal
exclusively with the LAPIC LINT# pins, not IO-APIC pins.

Interrupt Source Override Structure on the MADT are the ones that deal
with IO-APIC pins, and those we do forward them to dom0 and are setup
correctly (because they don't reference any Processor UID at all).

Thanks, Roger.



 


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