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Re: [PATCH v4 08/14] xen/arm32: head: Introduce an helper to flush the TLBs
- To: Julien Grall <julien@xxxxxxx>, <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Michal Orzel <michal.orzel@xxxxxxx>
- Date: Fri, 13 Jan 2023 11:46:51 +0100
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- Cc: <Luca.Fancellu@xxxxxxx>, Julien Grall <jgrall@xxxxxxxxxx>, "Stefano Stabellini" <sstabellini@xxxxxxxxxx>, Bertrand Marquis <bertrand.marquis@xxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>
- Delivery-date: Fri, 13 Jan 2023 10:47:01 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 13/01/2023 11:11, Julien Grall wrote:
>
>
> From: Julien Grall <jgrall@xxxxxxxxxx>
>
> The sequence for flushing the TLBs is 4 instruction long and often
> requires an explanation how it works.
>
> So create a helper and use it in the boot code (switch_ttbr() is left
> alone until we decide the semantic of the call).
>
> Note that in secondary_switched, we were also flushing the instruction
> cache and branch predictor. Neither of them was necessary because:
> * We are only supporting IVIPT cache on arm32, so the instruction
> cache flush is only necessary when executable code is modified.
> None of the boot code is doing that.
> * The instruction cache is not invalidated and misprediction is not
> a problem at boot.
>
> Signed-off-by: Julien Grall <jgrall@xxxxxxxxxx>
>
> ----
> Changes in v4:
> - Expand the commit message to explain why switch_ttbr() is
> not updated.
> - Remove extra spaces in the comment
> - Fix typo in the commit message
Thanks,
Reviewed-by: Michal Orzel <michal.orzel@xxxxxxx>
~Michal
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