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Re: [PATCH v2 07/10] xen/physinfo: encode Arm SVE vector length in arch_capabilities
- To: Jan Beulich <jbeulich@xxxxxxxx>
- From: Luca Fancellu <Luca.Fancellu@xxxxxxx>
- Date: Wed, 15 Mar 2023 10:39:50 +0000
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- Cc: Bertrand Marquis <Bertrand.Marquis@xxxxxxx>, Wei Chen <Wei.Chen@xxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Julien Grall <julien@xxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>, Andrew Cooper <andrew.cooper3@xxxxxxxxxx>, George Dunlap <george.dunlap@xxxxxxxxxx>, Wei Liu <wl@xxxxxxx>, "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- Delivery-date: Wed, 15 Mar 2023 10:40:15 +0000
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- Thread-topic: [PATCH v2 07/10] xen/physinfo: encode Arm SVE vector length in arch_capabilities
> On 15 Mar 2023, at 09:41, Jan Beulich <jbeulich@xxxxxxxx> wrote:
>
> On 15.03.2023 10:05, Luca Fancellu wrote:
>> --- a/xen/include/public/sysctl.h
>> +++ b/xen/include/public/sysctl.h
>> @@ -94,6 +94,9 @@ struct xen_sysctl_tbuf_op {
>> /* Max XEN_SYSCTL_PHYSCAP_* constant. Used for ABI checking. */
>> #define XEN_SYSCTL_PHYSCAP_MAX XEN_SYSCTL_PHYSCAP_gnttab_v2
>>
>> +#define XEN_SYSCTL_PHYSCAP_ARM_SVE_MASK (0x1FU)
>> +#define XEN_SYSCTL_PHYSCAP_ARM_SVE_SHFT (0)
>
> The second of these can be inferred from the first, so I'd like to ask
> that redundant definitions be omitted from the public headers. For the
> code using the constant we specifically have MASK_INSR().
>
> Just like there already are x86-specific sections in this file, I think
> the remaining single #define also wants enclosing in "#ifdef __aarch64__"
> here.
>
Thank you, I wasn’t aware of that useful macro, I will use it in the next
version and I’ll
enclose the mask using ifdef.
Are you ok for the position of the mask define or should I declare it somewhere
else?
> Jan
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