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Re: [RFC XEN PATCH 6/6] tools/libs/light: pci: translate irq to gsi
- To: Roger Pau Monné <roger.pau@xxxxxxxxxx>
- From: Jan Beulich <jbeulich@xxxxxxxx>
- Date: Mon, 20 Mar 2023 16:29:25 +0100
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- Cc: Huang Rui <ray.huang@xxxxxxx>, Anthony PERARD <anthony.perard@xxxxxxxxxx>, xen-devel@xxxxxxxxxxxxxxxxxxxx, Alex Deucher <alexander.deucher@xxxxxxx>, Christian König <christian.koenig@xxxxxxx>, Stewart Hildebrand <Stewart.Hildebrand@xxxxxxx>, Xenia Ragiadakou <burzalodowa@xxxxxxxxx>, Honglei Huang <honglei1.huang@xxxxxxx>, Julia Zhang <julia.zhang@xxxxxxx>, Chen Jiqian <Jiqian.Chen@xxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>
- Delivery-date: Mon, 20 Mar 2023 15:29:30 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
On 20.03.2023 16:16, Roger Pau Monné wrote:
> @@ -244,12 +242,18 @@ static void vioapic_write_redirent(
> }
> else
> {
> + int ret;
> +
> unmasked = ent.fields.mask;
> /* Remote IRR and Delivery Status are read-only. */
> ent.bits = ((ent.bits >> 32) << 32) | val;
> ent.fields.delivery_status = 0;
> ent.fields.remote_irr = pent->fields.remote_irr;
> unmasked = unmasked && !ent.fields.mask;
> + ret = mp_register_gsi(gsi, ent.fields.trig_mode,
> ent.fields.polarity);
> + if ( ret && ret != -EEXIST )
> + gprintk(XENLOG_WARNING, "vioapic: error registering GSI %u:
> %d\n",
> + gsi, ret);
> }
I assume this is only meant to be experimental, as I'm missing confinement
to Dom0 here. I also question this when the mask bit as set, as in that
case neither the trigger mode bit nor the polarity one can be relied upon.
At which point it would look to me as if it was necessary for Dom0 to use
a hypercall instead (which naturally would then be PHYSDEVOP_setup_gsi).
Jan
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