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[XEN PATCH] x86/msr: Allow hardware domain to read package C-state residency counters



Since it's limited to the hardware domain it should be safe and it's
very useful to have access to this directly in dom0 when debugging power
related things for example S0ix.
---
 xen/arch/x86/include/asm/msr-index.h |  9 +++++++++
 xen/arch/x86/pv/emul-priv-op.c       | 14 ++++++++++++++
 2 files changed, 23 insertions(+)

diff --git a/xen/arch/x86/include/asm/msr-index.h 
b/xen/arch/x86/include/asm/msr-index.h
index 4f861c0bb4..7e7255383d 100644
--- a/xen/arch/x86/include/asm/msr-index.h
+++ b/xen/arch/x86/include/asm/msr-index.h
@@ -704,4 +704,13 @@
 #define MSR_PKGC9_IRTL                 0x00000634
 #define MSR_PKGC10_IRTL                        0x00000635
 
+/* Package C-state residency counters */
+#define MSR_PKG_C2_RESIDENCY            0x0000060d
+#define MSR_PKG_C3_RESIDENCY            0x000003f8
+#define MSR_PKG_C6_RESIDENCY            0x000003f9
+#define MSR_PKG_C7_RESIDENCY            0x000003fa
+#define MSR_PKG_C8_RESIDENCY            0x00000630
+#define MSR_PKG_C9_RESIDENCY            0x00000631
+#define MSR_PKG_C10_RESIDENCY           0x00000632
+
 #endif /* __ASM_MSR_INDEX_H */
diff --git a/xen/arch/x86/pv/emul-priv-op.c b/xen/arch/x86/pv/emul-priv-op.c
index 142bc4818c..4593295ee2 100644
--- a/xen/arch/x86/pv/emul-priv-op.c
+++ b/xen/arch/x86/pv/emul-priv-op.c
@@ -965,6 +965,20 @@ static int cf_check read_msr(
         *val = 0;
         return X86EMUL_OKAY;
 
+    case MSR_PKG_C2_RESIDENCY:
+    case MSR_PKG_C3_RESIDENCY:
+    case MSR_PKG_C6_RESIDENCY:
+    case MSR_PKG_C7_RESIDENCY:
+    case MSR_PKG_C8_RESIDENCY:
+    case MSR_PKG_C9_RESIDENCY:
+    case MSR_PKG_C10_RESIDENCY:
+        if ( boot_cpu_data.x86_vendor != X86_VENDOR_INTEL )
+            break;
+        if ( is_hardware_domain(currd) )
+            goto normal;
+        *val = 0;
+        return X86EMUL_OKAY;
+
     case MSR_P6_PERFCTR(0) ... MSR_P6_PERFCTR(7):
     case MSR_P6_EVNTSEL(0) ... MSR_P6_EVNTSEL(3):
     case MSR_CORE_PERF_FIXED_CTR0 ... MSR_CORE_PERF_FIXED_CTR2:
-- 
2.40.1




 


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