[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v1 2/3] ARM: GICv3 ITS: do not invalidate memory while sending a command
- To: "xen-devel@xxxxxxxxxxxxxxxxxxxx" <xen-devel@xxxxxxxxxxxxxxxxxxxx>
- From: Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>
- Date: Tue, 19 Sep 2023 11:28:54 +0000
- Accept-language: en-US
- Arc-authentication-results: i=1; mx.microsoft.com 1; spf=pass smtp.mailfrom=epam.com; dmarc=pass action=none header.from=epam.com; dkim=pass header.d=epam.com; arc=none
- Arc-message-signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=IN0+pTBEp8aKCI0j9DsWywQSvBE4azf66KEfbeD3h7M=; b=nZ8pL7YrQB/7b30iXKurwsAz5lvPqMPcDX/Lyymlmnto+jdl9QO1YvzZXD4eq6s1VAOdASn4SuDdollZGnFx/Zfu58cUw85TnpCnXctXecdU+SVh0nEELf1eSbpJGIJ+ILUCd1DtIelfUciHUrDjsizV4C31hcxqaCxrIHA2Ahf/0GioTlrZSuJDXHhQqodoFJaoJ5hNlZEv+Z/1j2M7JYlxIMhK8hddK55A+ED4rUhdYR7gIcbPVMkzykfIdNj0/P3L0QiPj5pbmQaQ7/3m8+lKMkauLCuGCDoiy0b73xTUqHcYZFAZrIt+kNLWcfkeBf11jkGk/Q6EzpAajHCvFQ==
- Arc-seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=YLeCahHStfI3BUHo5C5Y6DTTFKAs/W+Mx+dRjUPEckXxYQySrcToTa/q9hrxuzMV+w5uHtGLTlO3eN4fa4gSDVACn1YYdOFIPAje1sN12loeOXZIIGCIw9Q3mfTiBTLmKzb7m+qmnkMYOti5I7OUimMjWlcvyc6ru943GQAjt8lmdHBpd+a+6OzYwwIgG/gzK/2qbcx1UQYNJV9Xjpl0sEK/dgEkfIemPzZrIE4+gX0qhbWmemN88pso7gCMRpoQCBM+4AbEbzZJsLwQF04dqsBqzEQJmSlO5xAC7a81432yFrLc7VBMZuvI9A9K4rhpgHQjwV1qYE17v5BjrNhIJw==
- Cc: Stewart Hildebrand <stewart.hildebrand@xxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>, Stefano Stabellini <sstabellini@xxxxxxxxxx>, Julien Grall <julien@xxxxxxx>, Bertrand Marquis <bertrand.marquis@xxxxxxx>, Volodymyr Babchuk <Volodymyr_Babchuk@xxxxxxxx>
- Delivery-date: Tue, 19 Sep 2023 11:29:17 +0000
- List-id: Xen developer discussion <xen-devel.lists.xenproject.org>
- Thread-index: AQHZ6ux4LpE3chDIj0mOPudUv9951Q==
- Thread-topic: [PATCH v1 2/3] ARM: GICv3 ITS: do not invalidate memory while sending a command
There is no need to invalidate cache entry because we just wrote into a
memory region. Writing itself guarantees that cache entry is valid.
But we still need to flush cache line to be sure that ITS sees a
command written into a queue.
Signed-off-by: Volodymyr Babchuk <volodymyr_babchuk@xxxxxxxx>
---
xen/arch/arm/gic-v3-its.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/xen/arch/arm/gic-v3-its.c b/xen/arch/arm/gic-v3-its.c
index a9c971a55f..72cf318810 100644
--- a/xen/arch/arm/gic-v3-its.c
+++ b/xen/arch/arm/gic-v3-its.c
@@ -108,8 +108,7 @@ static int its_send_command(struct host_its *hw_its, const
void *its_cmd)
memcpy(hw_its->cmd_buf + writep, its_cmd, ITS_CMD_SIZE);
if ( hw_its->flags & HOST_ITS_FLUSH_CMD_QUEUE )
- clean_and_invalidate_dcache_va_range(hw_its->cmd_buf + writep,
- ITS_CMD_SIZE);
+ clean_dcache_va_range(hw_its->cmd_buf + writep, ITS_CMD_SIZE);
else
dsb(ishst);
--
2.42.0
|
