[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] Re: [Xen-devel] [PATCH v13 for-xen-4.5 07/21] x86/VPMU: Handle APIC_LVTPC accesses
>>> On 13.10.14 at 20:05, <boris.ostrovsky@xxxxxxxxxx> wrote: > On 10/13/2014 09:02 AM, Jan Beulich wrote: >>>>> On 03.10.14 at 23:40, <boris.ostrovsky@xxxxxxxxxx> wrote: >>> @@ -706,10 +693,6 @@ static int core2_vpmu_do_interrupt(struct >>> cpu_user_regs *regs) >>> return 0; >>> } >>> >>> - /* HW sets the MASK bit when performance counter interrupt occurs*/ >>> - vpmu->hw_lapic_lvtpc = apic_read(APIC_LVTPC) & ~APIC_LVT_MASKED; >>> - apic_write_around(APIC_LVTPC, vpmu->hw_lapic_lvtpc); >> So why is simply deleting this correct? The comment makes pretty >> clear why it was being done here. All I could see being valid without >> further explanation is the removal of the middle of the three lines. > > It is expected that PMU interrupt will set the mask bit so whoever is > using PMU hardware (bare-metal or virtualized) is expected to clear it. > Therefore there is no reason for the hypervisor to do this. Makes sense. > I can add a note about it in the commit message. Yes please. Jan _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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