Re: [Xen-devel] [PATCH 08/15] xen: x86: add SGX cpuid handling support.

["Jan Beulich" <JBeulich@xxxxxxxx>]

>>> On 14.07.17 at 09:37, <andrew.cooper3@xxxxxxxxxx> wrote:
> On 13/07/17 07:42, Huang, Kai wrote:
>> On 7/12/2017 10:56 PM, Andrew Cooper wrote:
>>> On 09/07/17 10:10, Kai Huang wrote:
>>>> +            /* Subleaf 2. */
>>>> +            uint32_t base_valid:1, :11, base_pfn_low:20;
>>>> +            uint32_t base_pfn_high:20, :12;
>>>> +            uint32_t size_valid:1, :11, npages_low:20;
>>>> +            uint32_t npages_high:20, :12;
>>>> +        };
>>>
>>> Are the {base,size}_valid fields correct?  The manual says the are 
>>> 4-bit fields rather than single bit fields.
>>
>> They are 4 bits in SDM but actually currently only bit 1 is valid 
>> (other values are reserved). I think for now bool base_valid should be 
>> enough. We can extend when new values come out. What's your suggestion?
> 
> Ok.  That can work for now.
> 
>>
>>>
>>> I would also drop the _pfn from the base names.  The fields still 
>>> need shifting to get a sensible value.
>>
>> OK. Will do.
> 
> As a further thought, what about uint64_t base:40 and size:40?  That 
> would reduce the complexity of calculating the values.

But that may not really be portable. I've just checked the Intel
compiler (on Windows, admittedly), and it then starts the base
and size fields each on an 8-byte boundary. Hence all other fields
would then better also be uint64_t.

Jan


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