[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index] [Xen-devel] [PATCH RFC 0/4] x86/AMD: support newer hardware features
1: SVM: support data breakpoint extension registers 2: PV: support data breakpoint extension registers 3: x86/AMD: support further feature masking MSRs 4: x86/AMD: clean up pre-canned family/revision handling for CPUID masking Patches 3 and 4 are fully tested; for patches 1 and 2 I'm lacking suitable hardware, and hence depend on AMD's help (and patch 1 is also still lacking some tools side adjustments). Patch 3, otoh, has a couple of questions to be answered. Overall this makes the whole series RFC only for now. Signed-off-by: Jan Beulich <jbeulich@xxxxxxxx> _______________________________________________ Xen-devel mailing list Xen-devel@xxxxxxxxxxxxx http://lists.xen.org/xen-devel
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